My research group (Nano Devices and Application Lab) specializes in compact modeling for analog/RF applications of advanced semiconductor devices, including bulk MOSFETs, high-voltage MOSFETs (HV-MOS), and state-of-the-art technologies such as FinFETs, Nanosheets, and Gate-All-Around (GAA) FETs. I have over a decade of experience in developing industry-standard compact models, which are currently utilized in commercial design workflows. This includes contributions to BSIM-Bulk, BSIM-Bulk based high-voltage models, BSIM-CMG, among others. We are developing 2d memories for hardware security, developing industry standard compact model for ElectroStatic Discharge FETs, and investigating semiconductor behaviour at cryogenic temperatures for quantum applications.